Semiconductor fabrication processes typically involve a number of lithography steps to form various features and multiple levels of integrated circuit (IC) semiconductor devices. Lithography involves transferring a pattern from a reticle, or mask, disposed above a semiconductor substrate (e.g. a wafer) to a resist material on the semiconductor substrate. As the size of integrated circuit features continues to shrink, the minimum feature size which may be successfully fabricated becomes limited by performance characteristics of the lithography process, such as its resolution capability.
That said, advancements have been made in the resolution of photo lithography systems which have enabled continued improvements in integrated circuit (IC) production. The resolution (R) of lithographic pattern transfer is commonly defined as: R=k1(λ/NA); where λ is the wavelength of the exposing light (i.e. the exposure wavelength), NA is the numerical aperture, and k1 represents various process-dependent factors. To date, such resolution enhancements have been achieved primarily through decreases in the exposure wavelength and increases in the numerical aperture. A 193-nm exposure wavelength has been the industry standard for several years and dry lithography systems employ lens NAs exceeding 0.90, very close to the dry numerical aperture limit of 1.0. Thus, to further improve resolution for IC production, process-dependent factors (k1) of dry lithography systems will need to be further optimized, or other techniques, such as immersion lithography systems, will need to be employed.
Both high NA and immersion lithography systems employ polarized light to enhance image contrast which, in turn, improves resolution. As such, polarization represents one process-related (k1) factor which can be controlled to provide increased system resolution. Heightened image contrast also reduces the sensitivity of the lithography process to deviations in focus errors thereby extending process latitude.
To employ polarization as a resolution enhancement technique, information describing the polarization state, as well as other characteristics (e.g. intensity, distribution) of the exposing light at the wafer plane is desired. Present polarization metrology techniques include employing a large polarimeter in the optical path of the illumination system (e.g. via a beam splitter) or a specially designed PSM (phase shifting mask) reticle. However, such optical path polarimeters do not provide polarization state information at the wafer plane, and PSM reticles cannot be integrated into run-to-run metrology.